1. Field of Invention
The present invention relates to data processing systems and is more particularly concerned with the addressing of internal registers in the central processing units (CPU's) of such systems.
2. Discussion of Prior Art
In B.P. No. 1,394,431 there is provided a multiprocessor system in which each CPU is provided with an individual bus to provide access to information held in storage locations and peripheral equipments using a comprehensive single addressing system. In such an arrangement each address comprises a module number which specifies the module (i.e. store module or peripheral equipment) and an offset address used to define the required location within the module.
It is an aim of the present invention to extend the addressing system so that normal addressing instructions are used to access internal registers.